Phase-locked loops (PLLs) are common building blocks in wireless transceivers. They provide a reference signal used to modulate/demodulate data between baseband and radio frequencies. In a digital PLL (DPLL), the phase of a voltage-controlled oscillator (VCO) is measured by a time-to-digital converter (TDC) and compared with a high-purity, low-frequency reference inside a phase detector. The phase detector produces a digital word being equal to the error phase, which is digitally filtered and then sent to digital-to-analog converter (DAC) in order to set the control voltage of the VCO. The VCO phase is measured and filtered in the digital domain rather than in analog PLL, thus both an analog-to-digital converter (ADC) and a DAC are used. The TDC acts as an ADC inside the DPLL by measuring the VCO phase and quantizing it to produce a digital word.
Typical implementations of the TDC use a delay line or a delay-locked loop (DLL). A DLL produces an integer number of equally spaced phases by dividing the input signal period into an integer number (equal to the number of delay elements used). The phase of the input signal is measured by sampling each phase of the DLL with a reference clock, with the sampled sequence (zeros and ones) containing the information on the phase to be measured. The time resolution (e.g., the least significant bit (LSB)) of the TDC is equal to the time delay introduced by each delay element in the DLL. The finite TDC resolution introduces quantization error which, under certain conditions, can be considered as a white noise. The coarser the time resolution, the higher the quantization noise. Since the TDC noise is added in the PLL feedback path, the noise is low pass filtered by the PLL and it appears as PLL in-band noise.
Typical implementations of the TDC exhibit some mismatch between the amplitude of each LSB. As a consequence the VCO measured phase shows an error, which inherits the same periodicity of the VCO phase itself. This periodic error appears in the DPLL output signal spectrum as spurious sidebands around the carrier. These spurs limit the application of a DPLL as a frequency generator where high spectral purity is desired as the spurs are impractical to be filtered since a low-bandwidth DPLL would be needed.